AHB3

On Chip Debug Hardware

Image
RISC-V Debug System Overview (Source: Figure 2.1 in RISC-V External Debug Support Version 0.13.2)
Component is required for safety critical systems
Nein
Target TRL at the end of phase 1
TRL5: Versuchsaufbau in vereinfachter Einsatzumgebung --> Optimierte Plattform
Target TRL at the end of phase 2
TRL6: Prototyp in vereinfachter/simulierter Einsatzumgebung --> Anwendungsfälle

Infineon implements for its evaluation platform in alignment with Partner Lauterbach specific Hardware Components for On-Chip-Debug. The Hardware acts as Evaluation Vehicle for the Lauterbach On Chip Debug solution.

Status
License

The Infineon Solution will be productized with its chips. It is therefore no tool or IP but part of semiconductor products.

Visibility
Internal for Scale4Edge partners only!